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This example shows how a priority mechanism could be modeled for an interrupt handler Process int1_proc has the highest priority, and process int3_proc has the lowest Whenever one of the processes is triggered, the appropriate interrupt handler is placed on signal int, and the interrupt handler for that interrupt is called The model consists of three processes that drive the interrupt signal int, and another process to call the appropriate interrupt handling function Signal int is not a resolved signal and therefore cannot have multiple drivers If a resolution function is written for signal int, the order of the drivers cannot be used to determine priority Therefore, the approach shown in the preceding was taken In this approach, three internal signals intsig1, intsig2, and intsig3 are driven by each of the processes, respectively These signals are then combined, using a conditional signal assignment statement The conditional signal assignment statement makes use of the predefined attribute QUIET to determine when a transaction has been assigned to a driver of a signal It is required that transactions are detected on the internal signals, because the process always assigns the same value so an event only occurs on the first assignment The priority mechanism is controlled by the conditional signal assignment statement When a transaction occurs on intsig1, intsig2, or intsig3, the assignment statement evaluates and assigns the appropriate value to signal int based on the signal(s) that had a transaction If a transaction occurred only on intsig2, intsig2 QUIET would be false, causing the conditional signal assignment statement to place the value of intsig2 on signal int But what happens if intsig3 and intsig2 occur at the same time The conditional signal assignment statement evaluates, and the first clause that has a WHEN expression return true does the assignment and then exits the rest of the statement For this example, the value for intsig2 is returned, because it is first in the conditional signal assignment statement The priority of the inputs is determined by the order of the WHEN clauses in the conditional signal assignment statement.

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2 Call routed to cellular network 6 Page MS base station 5 Setup circuits to base station serving MSC 4 Return information voice signaling 3 Query for registration status and features HLR

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telecommunications, nor did they have the financial resources to fund such capital-intensive investments Thus, the Endgames cycle that we see at work now is a more recent development reaching back to the late 1980s and the start of the current merger and acquisition boom Since that time, the number of mergers has been growing at a compound rate of nearly 21% per year, and the shift toward the super deals continues to grow The trend is clear: as the speed of business continues to increase, so too will the pace of consolidation In fact, we believe that eventually a full consolidation life cycle could run its course in just 10 to 15 years Even in these times of corporate scandal and falling stock prices, the Endgames dynamics are still at work: WorldCom s bankruptcy may induce an asset sale that will implicitly encourage further consolidation and Enron s demise might prod similar consolidation in the energy industry The headline stories, whatever they may be, do not challenge the immutable long-term trends of the Endgames theory Knowing this, we can create long-term forecasts of merger movements and, more specifically, we should be able to predict which target companies might be part of the forecast Eventually, calculations

When a subscriber is roaming, and the originating MSC receives the dialed digits, the following procedures are performed to complete the call (see Figure 513): 1 Obtain MS registration status The MSC queries the HLR to determine if the MS is available to receive a call

The process that implemented the interrupt handling for the previous example uses the TRANSACTION attribute in a WAIT statement This

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